x86: rmb() can be weakened according to new Intel spec.
authorKeir Fraser <keir.fraser@citrix.com>
Wed, 21 Nov 2007 14:36:07 +0000 (14:36 +0000)
committerKeir Fraser <keir.fraser@citrix.com>
Wed, 21 Nov 2007 14:36:07 +0000 (14:36 +0000)
commit539c329f1f77c98963bbc88bb3144d0128261bfa
tree78dff2ab2967c358696cf9aa0410e258165560d5
parent07dd618798bf97a19e5632329f68422378e0ea99
x86: rmb() can be weakened according to new Intel spec.

Both Intel and AMD agree that, from a programmer's viewpoint:
 Loads cannot be reordered relative to other loads.
 Stores cannot be reordered relative to other stores.

Intel64 Architecture Memory Ordering White Paper
<http://developer.intel.com/products/processor/manuals/318147.pdf>

AMD64 Architecture Programmer's Manual, Volume 2: System Programming
<http://www.amd.com/us-en/assets/content_type/\
 white_papers_and_tech_docs/24593.pdf>

Signed-off-by: Keir Fraser <keir.fraser@eu.citrix.com>
xen/include/asm-x86/system.h
xen/include/asm-x86/x86_32/system.h
xen/include/asm-x86/x86_64/system.h